The main difference is that the gate width of silicon transistors is different.
The so-called low and high nanometers refer to the difference in gate width of the smallest unit silicon transistor inside the chip. In the same area, the gate width of the high nanometer is smaller, which means that the same area of the high nanometer can accommodate more silicon transistors, and the more silicon transistors, the more computing power of the chip. Of course, high nano refers to the high nano level, that is, the numerical value of the small nano process.