1, the raw material wafer of the chip, the composition of the wafer is silicon, silicon is refined by quartz sand, the wafer is the silicon element to be purified (99.999%), and then some pure silicon into silicon rods, become the material for the manufacture of integrated circuits of quartz semiconductor, the chip is the specific needs of the wafer production. The thinner the wafer, the lower the cost of production, but the higher the requirements for the process.
2, wafer coating wafer coating can resist oxidation and temperature resistance, and its material is a kind of photoresistance.
3, wafer lithography development, etching this process uses chemicals that are sensitive to ultraviolet light, that is, they become soft in the face of ultraviolet light. The shape of the chip can be obtained by controlling the position of the shade. Silicon wafers are coated with photoresist so that they dissolve when exposed to ultraviolet light. This is where the first shade can be used, so that the part of the ultraviolet light is dissolved, which can then be washed away with a solvent. So the rest of the piece is in the same shape as the shade, which is exactly what we want. This gives us the silica layer we need.
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4. Add impurities and implant ions into the wafer to generate corresponding P and N class semiconductors. The specific process is to start from the exposed area on the silicon wafer and put it into a chemical ion mixture. This process will change the way the doped zone conducts electricity, so that each transistor can be on, off, or carry data. Simple chips can use only one layer, but complex chips often have many layers, and this process is repeated over and over again, and the different layers can be connected by opening a window. This is similar to the production principle of the layer PCB board. More complex chips may require multiple layers of silica, which can be achieved through repeated lithography and the above process to form a three-dimensional structure.
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5, wafer test After the above several processes, a lattice grain is formed on the wafer. The electrical characteristics of each grain were detected by means of needle measurement. Generally, the number of grains per chip is huge, and organizing a pin test mode is a very complex process, which requires the production of a large batch of models with the same chip specifications as far as possible. The larger the quantity, the lower the relative cost, which is also a factor why the mainstream chip device cost is low.
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6, packaging will be manufactured to complete the wafer fixed, binding pins, according to demand to make a variety of different packaging forms, which is the same chip core can have different packaging forms of reason. For example: DIP, QFP, PLCC, QFN and so on. This is mainly determined by the user's application habits, application environment, market form and other peripheral factors.
2, lithography (using ultraviolet light through the mask to illuminate the silicon wafer, the illuminated area will be easy to wash off, and the unilluminated area will remain the same. Then you can carve the desired pattern on the silicon wafer. Note that at this point no impurities have been added and it is still a silicon wafer.)
3, ion implantation (in the silicon wafer in different positions to add different impurities, different impurities according to the concentration\/location of the different to form the field effect tube.)
4.1 Dry etching (Many of the shapes previously carved with light are not actually what we need, but are etched for ion implantation. It is now necessary to wash them off with plasma, or some structures that do not need to be engraved in the first step of lithography, which is etched).
4.2, wet etching (further washed off, but with reagents, so called wet etching)- after the completion of the above steps, the field effect tube has been made, but the above steps are generally done more than once, it is likely to need to do over and over again to meet the requirements.
5. Plasma flushing (bombarding the entire chip with a weaker plasma beam)
6, heat treatment, which is divided into:
6.1 Rapid thermal annealing (that is, the whole film is instantly illuminated to more than 1200 degrees Celsius by a high-power lamp, and then slowly cooled down, in order to make the injected ions can be better started and thermal oxidation)
6.2 Annealing
6.3 Thermal oxidation (to produce silica, the gate of the FET)