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gal芯片ichaiyang 2024-05-09 19:30 10
FPGA is the abbreviation of Field Programmable Gate Array, that is, field programmable gate array, which is further developed on the basis of programmable devices such as PAL, GAL,...

The principle of FPGA parallel computing?

FPGA is the abbreviation of Field Programmable Gate Array, that is, field programmable gate array, which is further developed on the basis of programmable devices such as PAL, GAL, EPLD. It appears as a semi-custom circuit in the field of application-specific integrated circuit (ASIC), which not only solves the shortcomings of custom circuit, but also overcomes the shortcomings of the limited number of gate circuits of the original programmable device.

FPGA adopts a new concept of Logic Cell Array (LCA). Configurable Logic Block (CLB), Input Output Block (IOB), and Interconnect (Interconnect). The basic features of FPGA are:

1) The use of FPGA design ASIC circuit, users do not need to project production, can get a suitable chip. --2) The FPGA can be used as pilot sample of other fully customized or semi-customized ASIC circuits.

3) There are abundant triggers and I\/O pins inside the FPGA.

4) FPGA is one of the devices with the shortest design cycle, the lowest development cost and the lowest risk in ASIC circuits.

5) FPGA adopts high-speed CHMOS process, low power consumption, and can be compatible with CMOS and TTL levels.

It can be said that FPGA chip is one of the best choices for small batch system to improve system integration and reliability.

At present, there are many varieties of FPGA, XILINX's XC series, TI's TPC series, ALTERA's FIEX series and so on.

The FPGA is set by the program stored in the on-chip RAM to set its working state, so the on-chip RAM needs to be programmed when working. Users can use different programming methods according to different configuration modes.

During power-on, the FPGA chip reads the data from the EPROM into the on-chip programming RAM. After the configuration is completed, the FPGA enters the working state. After a power failure, the FPGA recovers into a white sheet, and the internal logic relationship disappears, so the FPGA can be used repeatedly. FPGA programming does not require a dedicated FPGA programmer, only a universal EPROM or PROM programmer can be used. When you need to modify the FPGA function, just replace a piece of EPROM. In this way, the same FPGA, different programming data, can produce different circuit functions. Therefore, the use of FPGas is very flexible.

The FPGA has several configuration modes: the parallel main mode is one FPGA plus one EPROM; Master-slave mode can support one PROM programming multi-chip FPGA; Serial mode can use serial PROM programming FPGA; Peripheral mode allows the FPGA to be used as a microprocessor peripheral and programmed by the microprocessor.