The clock chip is next to a 14.314 crystal oscillator and there is nothing called a frequency generator. The bus clock frequency is in MHz, and the higher the operating frequency, the faster the bus working speed, that is, the wider the bus bandwidth.
Conceptual understanding of SPI bus clock polarity and clock phase
SPI is the abbreviation of Serial Peripheral interface, which means serial peripheral interface. SPI is a high-speed, full-duplex, synchronous communication bus, and only occupies four wires on the pin of the chip, saving the pin of the chip, while saving space for the layout of the PCB, providing convenience, it is out of this simple and easy to use characteristics, now more and more chips integrate this communication protocol.
There are two modes of operation: master mode and slave mode, both of which support a rate of 3Mbit\/s, and also have a transfer completion flag and a write conflict protection flag.
Two concepts closely related to SPI are clock polarity and clock phase.
Clock polarity: Indicates whether the clock signal is high or low when idle.
Clock phase: Determines whether data is sampled along the rising edge of SCK or the end edge of SCK.
The following takes the 7022B chip of Torque as an example to analyze the setting of SPI working mode.
In the data book of 7022B, it is stated that data is placed at the rising edge of SCK and taken at the falling edge. The DIN data is sampled into 7022B at the falling edge of SCK, and the 7022B data is placed on top of the DOUT output at the rising edge of SCK.
The following is an example of simulating the SPI bus to read 7022B. This example vividly shows when to put data and when to sample data.
unsigned long Read_reg3(unsigned char cmd)
{
int我;
无符号长数据;
set_bit (SPI_PORT SPI_SS);
clr_bit (SPI_PORT SPI_SCK);
clr_bit (SPI_PORT SPI_SS);
(我= 0,
{
set_bit (SPI_PORT SPI_SCK);
if(cmd&0x80)
{
set_bit(SPI_PORT,SPI_MOSI);
｝
其他
{
clr_bit (SPI_PORT SPI_MOSI);
｝
cmd=cmd
That;
That;
clr_bit(SPI_PORT,SPI_SCK); nop;
｝
clr_bit (SPI_PORT SPI_SCK);
_delay_us (3);
数据= 0;
(我= 0,
{
set_bit (SPI_PORT SPI_SCK);
That;
That;
That;
if(PINB&(1)
{
data = 1;
其他}
{
数据= 0;
｝
Date = date
That;
clr_bit (SPI_PORT SPI_SCK);
｝
set_bit (SPI_PORT SPI_SS);
返回数据;
｝
If the hardware SPI is used, it is necessary to set the SPI register of the single chip microcomputer (ATMEGA16). In this example, SPCR=0x57 is required. \/\/MSB before 01010011
The clock polarity is 0 because the CLK level is low when idle.
The clock phase is set to 1 because the data is sampled along the falling edge and released along the rising edge.
My misunderstanding of SPI is the concept of sampling. For example, falling edge sampling, when the host receives, I think there should be a falling edge first, and then sampling.
In fact, the correct understanding is that sampling is a consistent concept for both the host and the slave machine, and the data must be prepared before sampling. When the host receives data, the host is also sampling the falling edge, but before the falling edge occurs, the data must be prepared, in other words, after the slave machine occurs at the rising edge, the data must be released to prepare for the falling edge sampling.
Computer Pulse - The ins and outs of clock frequency
microcomputer
A beautiful piece of music has a theme, and the theme of a computer is the clock rate of the CPU. Main frequency, external frequency and double frequency, where do they come from? Frequency locking, overclocking, what is going on?
computer
There are many, many semiconductor chips, each of which operates at a specific clock frequency. The clock signal provided by the clock generator to the chip is a continuous pulse signal, and the pulse is equivalent to the pulse of the chip, each time the pulse arrives, the transistor in the chip changes the state once, so that the whole chip can complete a certain task.
The vast majority of the chips in the computer belong to the digital logic chip, and the numerous transistors in the digital chip all work in the on-off state, and their on-off and off-off actions are all carried out in accordance with the rhythm of the clock signal. If the clock rate is too high, it may occur that the state of the transistor is too late to change, resulting in deadlock or random misoperation. So, each chip has its own frequency limit.
One, what is the frequency?
The frequency is expressed in f, the basic unit is \"1 time\/second\
Figure 1: The more pulse heads, the higher the frequency
Table 1: Frequency representation
Frequency unit kHz MHz GHz THz
Conversion relation 1×10^3Hz 1×10^6Hz 1×10^9Hz 1×10^12Hz
英文名称千赫兹兆赫兹千赫兹Tera赫兹
The Chinese name kilohertz megahertz terahertz
1. Period and frequency
In computer technology, a common term corresponding to frequency is period. The period is the reciprocal of the frequency, and the higher the frequency, the shorter the period. For example, when the clock frequency is 1GHz, the clock cycle is 1 nanosecond (Table 2).
Table 2: Frequency and period comparison table
Clock Frequency Clock Cycle Clock frequency Clock cycle
5MHz 200ns 133MHz 7.5ns
10MHz 100ns 166MHz 6.0ns
20MHz 50ns 200MHz 5.0ns
25MHz 40ns 250MHz 4.0ns
33MHz 30ns 300MHz 3.3ns
40MHz 25ns 333MHz 3.0ns
50MHz 20ns 400MHz 2.5ns
66MHz 15ns 500MHz 2.0ns
80MHz 12ns 800MHz 1.2ns
100MHz 10ns 1GHz 1.0ns
120MHz 8.3ns 4GHz 0.25ns