1. The packaging process can generally be divided into two parts, the process step before the plastic packaging becomes the front section operation, and the process step after the molding becomes the rear section operation.
2. The basic process flow of chip packaging technology: silicon wafer thinning silicon wafer cutting chip mounting, chip interconnection molding technology to flash burr cutting rib molding solder coding and other processes.
3. The back thinning technology of silicon wafer mainly includes grinding, grinding, chemical mechanical polishing, dry polishing, electrochemical corrosion, wet corrosion, plasma enhanced chemical corrosion, atmospheric pressure plasma corrosion, etc.
4. First slice and then reduce: Cut a certain depth of incision on the front of the silicon wafer before grinding on the back, and then grinding on the back.
5. Thinning: Before thinning, the incision is cut mechanically or chemically, and then thinned to a certain thickness using ADPE corrosion technology to remove the remaining processing amount to achieve automatic separation of the bare chip.
6. There are four kinds of chip mounting methods: eutectic pasting method, welding pasting method, conductive adhesive pasting method and glass adhesive pasting method.
Eutectic paste method: The use of gold-silicon alloy (generally 69%Au,31% Si), 363 degrees at the eutectic fusion reaction to make the IC chip paste fixed.
7. In order to obtain a better eutectic mounting method, the back of the IC chip is usually first plated with a film of gold or the pre-chip is first implanted on the chip carrier of the substrate
8. The common methods of chip interconnection are wire bonding, on-board automatic bonding (TAB) and flip chip bonding.
9. Wire bonding technology, ultrasonic bonding, hot pressing bonding, hot ultrasonic bonding.
10. Key technologies of TAB: 1 chip convex point production technology 2TAB carrier tape production technology 3 Carrier lead and chip convex point internal lead welding and carrier lead welding technology.
11. The production process of the convex chip, the technology of forming the convex point: evaporation\/sputtering coating point production method, plating convex point production method of ball and template printing production, solder convex point hair, chemical plating coating point production method, ball convex point production method, laser method.
12. Plastic packaging molding technology, 1 transfer molding technology, 2 injection molding technology, 3 preforming technology, but the main technology is transfer molding technology, the transfer technology used by the material is generally thermosetting polymer.
13. The thinned chip has the following advantages: 1, the thin chip is more conducive to heat dissipation; 2, reduce the chip package volume; 3, improve the mechanical properties, silicon wafer thinning, the better its flexibility, the less stress caused by external impact; 4, the thinner the thickness of the chip, the shorter the connection between the components, the lower the component on-resistance, the shorter the signal delay time, so as to achieve higher performance; 5, reduce the amount of scribing processing after thinning, can reduce the amount of scribing processing, reduce the incidence of chip collapse.
14. Wave soldering: The wave soldering process includes fluxing, preheating and passing the PCB board on a solder crest, relying on the combined action of surface tension and capillary phenomenon to bring the flux to the PCB board and component pins to form welding points.
Wave soldering is the molten liquid solder, with the help of the pump, form a specific shape of the solder wave on the liquid surface of the solder tank, the PCB installed on the component is placed on the transmission chain, through a specific Angle and a certain depth of entry through the solder wave peak to achieve the welding process of solder joints.
Reflow welding: It is a group or point-by-point welding process in which the solder end or pin of the surface assembled component is mechanically and electrically connected to the printed board pad by placing the appropriate amount and form of solder at the PCB welding site in advance, and then sticking the surface assembled component to the surface assembled component, and then remelting the solder paste pre-allocated to the printed board pad.
15. Wire bonding (WB) : The thin metal wire or metal strip is sequentially punched on the welding pad of the chip and the pin frame or the package substrate to form a circuit interconnection. Wire bonding technology includes ultrasonic bonding, hot pressing bonding, thermal ultrasonic bonding.
Automatic Carrier bonding (TAB) : Technical process for connecting the chip bonding area to the metal wiring bonding area on the I\/O or substrate of the electronic package housing with a metal foil wire with lead pattern.
Flip chip bonding (FCB) : A method in which the chip weld area is directly connected to the substrate weld area with the chip face down.
16. Chip interconnection: The chip welding area is connected with the I\/O of the electronic package shell or the metal wiring welding area on the substrate, and only the circuit connection of the chip and the package structure can play the existing functions.
The process of packaging is an important part of semiconductor manufacturing and is used to encapsulate the finished chip in a plastic housing with a metal pin or ball at the bottom. The following is the general packaging process:
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1. Silicon wafer preparation: The wafer is first cut, glass passivation treatment and cleaning steps.
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2. Fix the chip: Glue the chip to the base and use special tools to locate it.
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3. Wire welding: Connect the chip with the pin with a wire or ball, and then paste them to the side of the chip.
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4. Plastic injection molding: The plastic particles are heated and injected into the mold to form a plastic shell with pins or balls under high pressure.
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5. Cleaning and testing: Cleaning residues and quality testing to ensure that each packaged chip meets specifications.
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6. Cutting: The shell will then be cut off and marked with information such as number in the appropriate position.
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7. Packaging: Finally, the finished chip is placed in a sealed package in an electrostatic resistant environment and is ready for shipment.
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The above is a general packaging process, in the actual operation process may be adjusted to meet different product needs.
The flow of the packaging process is to provide a semi-encapsulated wafer, on which a cutting path and a metal welding pad of the chip are provided; Forming a first protective layer on the cutting path; The metal electrode under the ball is formed on the metal welding pad; A welding ball is formed on a metal electrode under the ball; The wafer is sliced along the cutting path.
The first protective layer of the invention can prevent the metal in the cutting path from being electroplated and precipitated, and can protect the side of the discrete chip after cutting, and the process flow is simple, and the packaging efficiency and the yield are improved.