74160, is a 4-bit binary counter, it has asynchronous clear end and synchronous clear end is different, it is not controlled by the clock pulse, as long as the active level, immediately clear zero, no need to wait for the next count pulse effective edge to come.
Specific functions are as follows:
1. Asynchronous zero clearing function
The output is \"0\" whenever the (CR's not) significant level arrives, with or without the CP pulse. In the graphic symbol, the non-signal of CR is CT=0, if it is connected to a heptal counter, pay special attention here, the signal of the control clear end is not N-1 (6), but N (7) state. In fact, it is easy to explain that because the asynchronous clear end signal takes effect immediately once it appears, such as 0111, it is immediately sent to the (CR) non-end, so that the status becomes 0000. Therefore, the clear signal is very short-lived, only an excessive state, can not become a state of counting. The clear end is low active.
2. Synchronous data setting function
When the (LD non) level is active, the counting function is disabled, and the data from D0 to D3 under the rising edge of the CP pulse is inserted into the counter and presented at the Q0 to Q3 end. If it is connected into a heptal counter, the signal of the control set is N (7) state, such as 0000 in D0 ~ D3, the data presented in Q0 ~ Q3 is 0110.
74160n has the effect of asynchronous zeroing, in the counting function, so no matter its output is in that state, as long as the asynchronous zeroing input side adds a low voltage, is zero, the chip will immediately return from any state to 0000 state.
From the carry end of the first stage rco, the signal input end of the next level cp sends a signal, so that the chip of the next level can count and start. cet and cep at the count enable end are connected to the high level. When load and clr at the set end and CLR at the clear end input the high level, they are in the count state and connected to the next level at the other end of the not gate, the zero-clear carry function can be achieved.