1, [Example 2] Try two 3-8-line decoder 74LS138 to form a 4-16-line decoder, and translate the input 4-bit binary code into 16 independent low-level signals. Solution 2716 chip capacity : As can be seen from Figure 8, 74LS138 has only three address input terminals. If you want to use 4-bit binary code, you can only use an additional control terminal (one of them) as the fourth address input.
2, the addressing range is 0~ 8192,74 LS138 is a 38-line decoder, sorted four pieces of 2864, if the first four bits of decoding output, the address space of a chip (assuming the offset address is 0x0000) is 2716 chip capacity : 0x0000~0x1FFF2716 chip capacity ; 0x2000~0x3FFF2716 Chip capacity ; 0x4000~0x5FFF; 0x6000 to 0x7FFF.
3, using EE2 and E3 can be cascaded into a 24-line decoder; If an external inverter can also be cascaded into a 32-line decoder. If one of the gating terminals is used as the data input terminal, the 74LS138 can also be used as a data distributor. Can be used in the 8086 decoding circuit, extendedFrom 0...
1, connecting RAM and CPU, need to carefully design the interaction of address line, data line and control line. This involves the load management of the CPU bus, the synchronization of the memory speed with the timing, the address assignment and slice selection strategy, and the precise transmission of the control signal. The variety and flexibility of memory range from read-only mask ROMs to programmable PROMs to erasable memory such as EPROM and E^2PROM, each with its own characteristics to meet the needs of different scenarios.
2, A to address the range of 4KB requires 12 lines, A0~A11 is connected to the A0~A11 of the CPU and is used for addressing within the ROM. The A12~A14 of the CPU is connected to the 38 decoder to generate the slice selection signal.
3, EPROM is a read-only memory chip that is programmed with electrical signals and erased with ultraviolet light. There is a circular window in the center above the chip housing, through which ultraviolet light can erase the original information. Since there are ultraviolet components in the sun, the program should be sealed with an opaque label after it is written to avoid destroying the program due to sunlight.
4, according to the different working principles, the current mainstreamThe first-level data cache used by the processor can be divided into real data read and write cache and data code instruction trace cache, which are respectively adopted by AMD and Intel. Different tier 1 data cache designs have different requirements for tier 2 cache capacity, so let's take a look at the differences between the two tier 1 data cache designs.
1, 【 Answer 】2716 Chip capacity : Commonly used EPROM chips are 2712732762712272527512, where 27 is the EPROM chip 2716 chip capacity code, the last 2 digits represent the EPROM storage capacity. For example, the 64 of 2764 stands for 64 KB (bit). In bytes, 8 bits per byte,The storage capacity of the 2764 is 8K x 8 bits, that is, 8KB (Byte).
2, if it is necessary to burn the software code is long, the chip program memory space is limited, should expand the external ROM (program memory), the maximum can be extended to 64k bytes, commonly used chips have 2764, 27128, 27256, 27512, etc., their storage space is 8k, 16k, 32k, 64k bytes.
3, ROM chip: (27-EPROM) 2716 (2K×8), 2732 (4K×8), 2764 (8K×8), 27128 (16K×8), 27256 (32K×8), 27512 (64K×8), etc. (28-EEPROM) : 2816 (2K×8), 2864 (8K×8). RAM chip: 6116 (2K×8 bit), 6264 (8K×8 bit), 62256 (32K×8 bit).
4. For example, 27512 15V indicates that the capacity of the EPORM is 64KB and the write voltage is 15V. We're sending it to the EPROMWhen writing data, be sure to pay attention to these two parameters. If the capacity is not selected correctly, the capacity will cause the data to be lost or the content to be written. When the write voltage is too low, data cannot be written to EPROM. When the write voltage is selected too high, the EPROM may be damaged.
2, this is the microcomputer principle of the problem - memory expansion. 2114 is 1K* 4-bit 2716 chip capacity , expanding to 16K*It is 8 bits. Do both word and bit expansion. The first bit expansion: two pieces of 2114 are used in parallel to form 1k*8 bits and then word expansion: the parallel chipset composed of two pieces of 2114 is word expansion so that the expansion process is completed.
3, the film selection signal can be connected to A10-A11 by a 2-4 decoder, and the address range is 00000-00FFF. This is a required knowledge point in the course of microcomputer principles and interface technology, the extension of memory. Answer adds hehe, 2716 chip capacity 4, ROM capacity 4K, address range 0-FFF, RAM1K, address range 0-3FF, if 400H (1K) as a page (logically), ROM accounts for 4 pages, RAM accounts for 1 page, then each page requires 10 bits of description, page number requires 2 bits of description, combined requires 12 bits. Page number: Page space xx: XX-XXXXXXXX where the high 2 digits of the page number correspond to the high address fully decoded to the ROM film selection signal. 5, K*1 bitThe chip means that this chip has 1024 cells, each cell has a bit of binary, because 2^10=1024, so in order to distinguish between these 1024 cells you need 10 address lines. One chip provides 1K of space, 32K is 32 pieces. The composition of this system requires a total of 32*8=256 chips, a group of 8 pieces, a total of 32 groups. 6, bit expansion: when the number of memory chip units used meets the requirements, but the number of bits per unit is small, this expansion is needed. For example, using 4164 (64K*1) to expand the 64KB storage system, you needTo do bit expansion. The connection diagram is as follows: The figure shows that two 64K*4 chips are connected into a 64K*8 storage system. Don't quite understand your question, the 16-bit address bus can address 64KB, assuming only 4K* is used8B, just pick one 2716 and two 2114. Use A11~A13 to drive 74LS138, A1A15 to connect two low level enable terminals, so Y0 as 2716 chip selection, A0-A10 as its address line; Use two 2114s as 8BitRAM, enable the end and join Y2, A0-A10 as the address line, so that the workspace is only 2KB. Curing area 16k read/write area 24k EPRAM address cable 13 (2^13=8k) Data cable 8 SRAM 16k*4 address cable 14 Data cable4 Another address line 13 data line 4 Curing area EPRAM needs two chips for word expansion Read and write area needs six pieces of SRAM 8k*4 type for bit expansion in pairs first and then three groups of chips for word expansion. ... The capacity of the device is 4K×8 bit, in which the curing area is 2KB and EPROM chip 2716(2K×8 bit) is selected.