. The digital clock is actually a counting circuit that counts the standard frequency (1HZ). By countThe starting time can not be consistent with the standard time (such as Beijing time), so it is necessary to add a timing circuit on the circuit, and the standard 1HZ time signal must be accurate and stable. A digital clock is usually constructed using a quartz crystal oscillator circuit.
The course design report of the digital clock should cover the background of the design, the goal, the method, the realization process and the evaluation and reflection of the final result. In the design process, it is necessary to take into account the basic functions of the digital clock, such as the display of time, the update of time, and possible additional functions, such as alarm clock function, timer function, etc. In addition, you also need to pay attention to the display side of the digital clockType, such as whether to use LED display, LCD display and so on.
Course design digital clock, a total of 16 pages, 4088 words. The Foundation of Digital Electronic Technology is a basic course of electronic technology, which is the cornerstone of further study for our electronics students. Through this course design can deepen the understanding of this course and the mastery of relevant knowledge, at the same time can enhance the ability of independent thinking and operation.
1, title 74hc00d is what chip : Digital clock is a device that uses digital circuit technology to realize time, minute and second timing 74hc00d chip Compared with mechanical clock, it has higher accuracy and intuitionism 74hc00d chip And no mechanical device 74hc00d YesWhat chip , has a longer service life, so it has been widely used. In principle, a digital clock is a typical digital circuit, which includes a combinational logic circuit and a sequential circuit.
2, multi-functional digital clock (a) basic function 74hc00d is what chip : time should be 12 times 1, minutes, seconds 60. Accurate timing, showing the time of the minute and second in digital form. Correction time. (2) Extended function: timing control. Imitation radio time function. Automatic time on the hour. Touch the hour. (3) Music function: The arrival point will automatically tell the time, there is music to enjoy.
3, the input and output signal pin description: CLK: clock signal RST: system reset signal, low effective. After the clock reset, the value is 00, 00, 00. EN: Pause signal, low level effective, press the key, digital clock pause. S1: Adjust the hour signal, the low level is effective. Each time you press it, the hour increases by one hour. S2: Adjust minute signal, low level is effective. Each time you press, the minute increases by one minute.
4, in which the main circuit to complete the basic functions of the digital clockThe expansion circuit completes the expansion function of the digital clock. The arrangement of the paper is as follows: The introduction describes the practical significance of studying the electronic clock. Design content and design scheme The specific design scheme and design requirements of the electronic clock are discussed.
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1, composed of 74CH51D, 74HC00D and resistance, correction circuitThere are two parts of positive-time correction, and the circuit is shown in Figure 6. (7) The crystal oscillator circuit consists of a crystal with 2 30pF capacitors, 1 4060 and a 10 megabit resistor. Pin 3 of the chip outputs a 2Hz square wave signal, and the circuit is shown in Figure 7. (8) The hourly timing circuit is composed of 74HC30D and buzzer, when the time is 59:50 to 59:59, the buzzer, the circuit is shown in Figure 8.
1. Capacitor CC2 and crystal form a resonant networkThe network completes the function of controlling the oscillation frequency, and provides a 180-degree phase shift, thus forming a positive feedback network with the non-gate to realize the function of the oscillator. Because the crystal has high frequency stability and accuracy, the output frequency is stable and accurate.
2, the circuit shown in Figure 4-4 is composed of two 74160 can achieve 12 and 24 base conversion synchronous increasing counter. In the figure, the one-digit and ten-digit counters are connected to the decimal counting form, and the mode of synchronous cascade is adopted. Select the output QB of the ten digit counter and the output QC of the one digit counter through the and not gate NAND2 controls the zero-clearing end (CLR ') of the two counters, and uses the state 24 feedback to zero-clear to achieve base-24 incremental counting.
3, generally use the decimal counter such as 74HC290, 74HC390, etc., to achieve the counting function of the time counting unit. 74HC390 is selected in this design. As can be seen from its internal logic block diagram, it is a double 2-5-10 asynchronous counter, and each counter has an asynchronous zero clearing end (active high level). The second bit counter unit is a decimal counter, no decimal conversion is required, just QA and CPB (falling edge effective)Just connect.
4, the capacitor CC2 and the crystal constitute a resonant network to complete the control function of the oscillation frequency, while providing a 180-degree phase shift, so as to form a positive feedback network with the non-gate, to achieve the function of the oscillator. Because the crystal has high frequency stability and accuracy, the output frequency is stable and accurate. The crystal XTAL has a frequency of 32768HZ. This element is specially designed for digital clock circuits, and its low frequency is conducive to reducing the number of frequency dividers.
5, the use of two sexagesimal circuits to synthesize a double sexagesimal circuit, there is a carry between two sexagesimal digits. The double sexagesimal circuit uses CD4060, resistance and crystal oscillator to connect into a frequency division - crystal oscillator circuit. The frequency division - crystal oscillator circuit uses 74HC51D and 74HC00 and resistors to connect into a timing circuit. The timing circuit uses 74HC30 and the buzzer to connect to the hourly timing circuit. The hour signal circuit.
6, with two 74LS161 chips, one control bit, decimal; The other one controls the tens. It's a hexadecimal. The highest digit of the ones digit, 0, is followed by the CP of the tens digit, and the ones digit decimal counter passes through ten pulsesCycle once, every time the tenth pulse comes after Q from 1 to 0, equivalent to a falling edge, so that the ten hexadecimal counter count. After sixty pulses, both the ones and ten counters return to 0000.