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2716芯片容量ichaiyang 2024-05-30 11:20 75
1, Help: Microcomputer principle problem, design a 12KB capacity of memoryStorage, requiring EPROM area of 8KB, from 0... 2, The ROM part of a store is linked by a 2716EPROM memor...

2716 Chip capacity (Chip 2675)

Help: Microcomputer principle problem, design a 12KB capacity of memory, requiring EPROM area of 8KB, from 0...

. The main memory capacity of a machine is 2MB. If byte addressing is used, the address line must be ___21__ bits. 13. The control memory in a microprogrammed computer is used to store ___ microsThe order ___. 14. A common soft copy output device is the ___ monitor ___. 1 In the interrupt service procedure, after protecting and restoring the site, the __ interrupt is required. 16. [-0] is originally ___10000000___.

The first question: 1K=2 to the 10th power, and 16K is 2 to the 14th power to 16 times 2=32 pieces, 1 piece is 1K storage space, so you need 10 with the chip address line, because it is 16 groups, so you need 4 pieces of line selection, using partial decoding, but also more than 6 address lines, 8086 has 20 address lines,10 chip addresses, 4 chip lines.

In-depth exploration of the principle of microcomputer: The mystery of memory Memory, as the cornerstone of computer information, its working principle and classification are the key to understanding the operation mechanism of computers. The execution of each instruction is inseparable from the intervention of the memory, which is not only the temporary warehouse of data, but also the destination of the result of the operation. Classification of memory Memory can be divided into several categories according to different criteria.

② IF: (interrupt allow flag bit; 0: mask external maskable interrupt requests. 1: Allow to accept external maskable interrupt requests); Physical address refers to (the actual address of the memory, the physical address of a storage unit is unique); ROM in a microcomputer is (read-only memory). There are generally four ways to transmit information between the CPU and the interface, namely: (unconditional), (query), (interrupt), (DMA).

If the relation R and S have the same pattern, R has 6 tuples and S has 8 tuples, then ___ is not possible in the following four cases indicating the number of tuples of R∪S and R∩S result relation. A.6 B.1 C.13 D.10 3 InThe ROM portion of a storage is connected by a 2716EPROM memory chip,'> The ROM portion of a storage is connected by a 2716EPROM memory chip,

1, draw one, you have a look. 2716 is 2K*8, so you need 4 pieces of 271 to add 138 decoders according to the address requirements.

2, do not understand your problem, the 16-bit address bus can address 64KB, assuming that only 4K*8B, only choose a 2716 and two 2114. Drive 74LS138, A1A with A11~A1315 Connect the two low-level enable terminals, so that Y0 acts as the 2716 chip selection and A0-A10 acts as its address line; Use two 2114s as 8BitRAM, enable the end and join Y2, A0-A10 as the address line, so that the workspace is only 2KB.

3, the capacity is 2048×8bit. There are eight address lines D0 to D7. There are 11 address lines A0 to A10.

4, K read-only memory EPROM. The data will not be lost after the power failure, and it can only be read during the operation of the microcomputer system, but notA type of memory that performs write operations and is used to store fixed data.

5, K refers to 2K storage units (not necessarily bytes), 8 means that each storage unit is 8 binary bits.

... The capacity of the device is 4K×8 bit, in which the curing area is 2KB and EPROM chip 2716(2K×8 bit) is selected.

Don't quite understand your question, 16 bit addresses totalThe line can address 64KB, assuming that only 4K*8B is used, just choose one 2716 and two 2114. Use A11~A13 to drive 74LS138, A1A15 to connect two low level enable terminals, so Y0 as 2716 chip selection, A0-A10 as its address line; Use two 2114s as 8BitRAM, enable the end and join Y2, A0-A10 as the address line, so that the workspace is only 2KB.

K refers to 2K storage units (not necessarily bytes), and 8 means that each storage unit is 8 binary bits.

The capacity is 2048×8bit. There are eight address lines D0 to D7. There are 11 address lines A0 to A10.

This question is very simple, because the number of digits is the same, one is 4K needs 64K, 64÷4=16.

DMA working process flow is shown in the figure. Design question (10 points) The CPU has a total of 16 address lines and 8 data lines, and is used as a memory access control signal (low level is effective), and is used as a read and write control signal (high level is read, low level is write). Existing the following chips and various gate circuits (gate circuit customized), as shown in the figureYes.

According to the EPROM chip :2716, 2732, 2764, 27128, 27256, 27512 capacity, respectively write...

1, 【 Answer 】 : The commonly used EPROM chip has 2712732762712272527512, where 27 is the code name of the EPROM chip, and the last two digits represent the storage of the EPROMCapacity. For example, the 64 of 2764 stands for 64 KB (bit). In terms of bytes, each Byte is 8 bits, the storage capacity of 2764 is 8K x 8 bits, that is, 8KB (Byte, byte).

2, EPROM chip: 2764 storage capacity is 8K (8K*8bit) 27128 storage capacity is 16K (16K*8bit) 27256 storage capacity is 32K (32K*8bit) EPROM was invented by Israeli engineer Dov Frohman, is a computer storage core that can retain data after power failureTablets - that is, non-volatile (non-volatile).

3, if it is necessary to burn the software code is long, the chip program memory space is limited, should expand the external ROM (program memory), the maximum can be extended to 64k bytes, commonly used chips have 2764,27128,27256,27512, etc., their storage space is 8k, 16k, 32k, 64k bytes.

4, ROM chip: (27-EPROM) 2716 (2K×8), 2732 (4K×8), 2764 (8K×8), 27128 (16K x 8), 27256 (32K x 8), 27512 (64K x 8), etc. (28-EEPROM) : 2816 (2K×8), 2864 (8K×8). RAM chip: 6116 (2K×8 bit), 6264 (8K×8 bit), 62256 (32K×8 bit).

5, in the integrated read-only memory, the most commonly used is EPROM, EPROM 27127327627158 and other models. The storage capacity is 2k×4k×8k×16k×8 units, (Model 27The following number is the storage capacity in thousands). The following uses EPROM2716 as an example to illustrate its six working modes, as shown in Table 24-2.

6, of course, but now there is no need for it, 51 series of single-chip microcomputer is more, the larger ROM has 256K.

Making a dongle with 2716 memory chip and 25-port printer interface

In general, the software dog inserted in the parallel port, will not affect the normal printerWork. The common dongle encryption box shape, such as two male and female D-line 25-pin connectors are inverted together, the male head (DB25/M) is inserted in the parallel port, and the female head (DB25/F) can be connected to the printer, which is equivalent to the original parallel port. The entire dongle hardware circuit board is in this encrypted box about 5 centimeters by 5 centimeters.

Not all dongles use smart card chips, and not all dongles that use smart card chips are secure enough. At present, the core component of the mainstream dongle in the industry is the smart card chip, but only the secure smart card chip that integrates the most advanced encryption technology is the dongle securityThe whole core is there. However, because the smart card chip is mainly used in short-cycle products, its evolution is dominated by the consumer market, so its descendants are not compatible.

If it is a background dongle, the background customer will contact our customer service staff, we will send the driver to you to install, set the binding in the system after you can use, the same login you must use the dongle.

Design one with 74LS138The decoding circuit, respectively select 8 pieces of 2716, and list the proportion of each chip.

[Example 2] Try two 3-8-line decoder 74LS138 to form a 4-16-line decoder, and translate the input 4-bit binary code into 16 independent low-level signals. Solution: As can be seen from Figure 8, 74LS138 has only three address input terminals. If you want to use 4-bit binary code, you can only use an additional control terminal (one of them) as the fourth address input.

As can be seen from Figure 8, 74LS138 has only three address inputs. If you want to double the fourIn decimal code, only one additional control end (one of them) can be used as the fourth address input end.

To implement the number of logic functions using the 74LS138 decoder and gate circuit, you need to design the circuit according to the circuit diagram and the waveform diagram. The 74LS138 is A 3-wire to 8-wire decoder that has three inputs (A, B, C), eight outputs (Y0 to Y7), and three enable terminals (GG2A, G2B).

The above two formulas indicate that the first piece 74LS138 works while the secondWhen chip 74LS138 is disabled, the 8 codes of 0000 ~ 0111 are translated into 8 low-level signals; When the second 74LS138 works and the first 74LS138 is disabled, the eight codes of 1000 ~ 1111 are translated into eight low-level signals.